Figure 1 illustrates the basic timing requirements for each row (horizontal) that is displayed on a VGA monitor. An active-low pulse of specific duration (time a in the figure) is applied to the horizontal synchronization (hsync) input of the monitor, which signifies the end of one row of data and the start of the next. The data (RGB) input on the monitor must be driven low for a time period called the back porch (b) after the hsync pulse occurs, which is followed by the display interval (c). During the data display interval the RGB data drives each pixel in turn across the row being displayed. Finally, there is a time period called the front porch (d) where the data (RGB) inputs must again be off before the next hsync pulse can occur. The timing of the vertical synchronization (vsync) is the same as shown in Figure 3.9, except that a vsync pulse signifies the end of one frame and the start of the next, and the refers to the set of rows in the frame. Tables 1 and 2 show, for different resolutions, the durations of time periods a, b, c and d for both horizontal and vertical timing.



^{Figure 1 – VGA timing specification}

^{Table 1 – VGA horizontal timing specification}

^{Table 2 – VGA vertical timing specification}